Smart Switching in SiC: Bosch’s EG120 Gate Driver Demo Explained

At PCIM 2025, Bosch demonstrated a highly practical and elegant solution to a very real engineering problem: how to safely switch multiple SiC MOSFETs in parallel without destructive mismatches or current overshoot.

The star of the show? The EG120 digital gate driver — capable of adaptive gate current shaping. And the tool that proves it works? A Tektronix DPO4034B oscilloscope with multi-channel waveforms.

🔍 The Problem: Unbalanced Parallel Switching

In high-power applications like EV inverters, multiple SiC devices are often paralleled to handle higher currents. But even tiny differences in gate threshold or parasitics can lead to:

• Uneven current sharing
• One device switching early or late
• Thermal stress, EMI issues, or outright failure

⚙️ Bosch’s Solution: Adaptive Gate Current Shaping

The EG120 doesn't just “turn on” a MOSFET. It sculpts the gate drive — controlling how fast and how strongly each MOSFET switches. This helps match behavior across devices and achieve synchronized switching.

Gate shaping is like tuning how quickly you open a valve — sometimes fast, sometimes gentle, depending on what the system needs. With EG120, this shaping can be customized for each device.

📺 The Oscilloscope: Real-Time Feedback

In the demo, four channels of the Tektronix oscilloscope are used:

• CH1 (Yellow): Gate voltage of MOSFET A (V_{GS_A})
• CH2 (Blue): Drain-source voltage of MOSFET A (V_{DS_A})
• CH3 (Pink): Gate voltage of W-phase MOSFET (V_{GS_W})
• CH4 (Green): V_DS of W-phase MOSFET (V_{DS_W})

This setup helps engineers visualize if:

• All devices switch at the same time
• Voltage overshoot or ringing has been reduced
• Gate shaping has improved synchronization

🛠️ What Makes This Demo Effective

• Transparent enclosure: Lets you see the wiring and probe setup
• LEGO truck model: A fun metaphor for “vehicle-ready” power electronics
• PC-linked oscilloscope: Enables real-time shaping adjustment and waveform verification

🎯 Engineering Insight

This demo isn’t just about fancy waveforms — it’s about closed-loop development. You shape the gate drive, observe the effect on V_DS and V_GS in real-time, and optimize accordingly.

For anyone working with SiC, especially in multi-device setups, tools like EG120 combined with waveform visibility from scopes like the DPO4034B can make all the difference between theory and reliable hardware.

💬 Your Take?

Have you worked on SiC paralleling challenges? What tools or driver techniques have worked for you? Share your thoughts in the comments below!