The claim was on the screen, large and clear.
"Gen 4 delivers 30–50% reduction in turn-on switching losses."
Below it: two charts.
Left → V_DS overshoot vs. gate resistance (R_G). Right → Turn-on switching energy vs. load current.
Three curves on each. Competitor A. Competitor B. Wolfspeed Gen 4.
The Gen 4 line sits significantly lower — at every operating point, at every gate resistance value. The SOA limit line on the left chart shows Competitor A already breaching safe operating area at low R_G values. Wolfspeed Gen 4 stays comfortably below it.
The numbers on the left chart: Competitor A peaks at 1,141 V. Competitor B at 1,166 V. Wolfspeed Gen 4: 961 V — approximately 200 V lower peak V_DS overshoot.
→ That 200 V gap is not a rounding error. It is the difference between staying inside the SOA and not.
What the demo bench was actually showing
Below the screen: a full live switching test station.
The oscilloscope: Tektronix 5 Series MSO, running live waveforms. The screen showed three simultaneous comparison traces — labeled clearly as "Wolfspeed" vs. "Competitor A" vs. "Competitor B" — overlaid directly on the same capture. Gate voltage, drain current, and V_DS all visible simultaneously.
The probes: four Rogowski-style current probes clipped to the power loop, plus voltage differential probes on the switching node. Multiple probe inputs occupied the front of the 5 Series.
The DUT enclosure: a large acrylic transparent box containing multiple parallel power boards — green PCBs with blue thermal pad heatspreaders, a central control board, and a structured power loop beneath. The label inside the box read: "Industry-leading SiC Fet Products."
Right side: a Wolfspeed-branded high-power load module — the purple/black box with red and black high-current terminals — providing the DC bus and controllable load for the double pulse test sequence.
Left side: a laptop running Wolfspeed's data analysis software, showing statistical distribution charts and bar graphs comparing loss parameters across the three device families.
On the table to the right: evaluation boards for the Wolfspeed SiC Top Side Cooled Discrete Package — a new packaging format designed to move heat removal to the top of the device rather than the substrate, enabling higher power density in constrained board layouts.
Chart 1 → V_DS Overshoot vs. R_G(ON)
This is a fundamental tradeoff in SiC gate drive design.
Lower R_G → faster switching → lower switching energy → but higher V_DS overshoot from loop inductance interaction.
The problem: if overshoot pushes V_DS above the device rating, you either accept the risk or increase R_G to slow down the transition — which erases the efficiency benefit.
The SOA limit line on the chart shows exactly where that boundary sits. For Competitors A and B, crossing into low R_G territory means crossing into danger. Wolfspeed Gen 4 doesn't reach that limit, even at R_G = 2 Ω.
→ This means the designer can use lower gate resistance without triggering overvoltage stress. → That directly translates into the switching energy reduction in Chart 2.
Chart 2 → Turn-On Switching Energy vs. Load Current
As load current increases from 0 to 100 A, switching energy rises for all three devices. But the slope and absolute values diverge significantly.
Competitor A: steep curve, reaching approximately 2.0 mJ at 100 A. Competitor B: similar trajectory. Wolfspeed Gen 4: substantially flatter, ending near 0.5–0.7 mJ at 100 A.
→ The improvement compounds at high current — where EV inverters, industrial motor drives, and data center power modules actually operate.
The standard engineering reaction to a benchmark chart is: that's their own test, of course it looks good.
That's a reasonable instinct.
But the physical mechanism behind these improvements is real and documented.
Gen 4 SiC devices achieve lower overshoot through a combination of: → Reduced output capacitance (C_OSS) at turn-on → Lower transconductance nonlinearity during the current rise → Tighter die-to-package parasitic inductance in the new packaging generations
None of these can be faked on a chart. They show up directly in the switching node waveform — which is why Wolfspeed ran the live oscilloscope comparison rather than just presenting datasheets.
The oscilloscope on this bench was not decoration. It was the argument.
Here is the uncomfortable engineering reality that this demo implicitly acknowledges:
Measuring SiC switching performance accurately is extremely difficult.
The same device in a different layout will produce different numbers. The same device with a different gate driver — different numbers. The same device with a probe positioned 5 mm further from the switching node — different numbers.
The Wolfspeed bench controlled for all of this. The DUT enclosure, the loop layout, the probe placement — all fixed. The only variable was the device.
That's how you make a benchmark credible.
But it also means: the 30–50% improvement is valid under those specific conditions. Reproducing it in your own design requires matching those conditions — loop inductance, gate resistance, thermal environment, bus voltage.
→ The improvement is real. The transferability requires engineering work.
The evaluation boards on the table to the right were easy to walk past.
They shouldn't be.
Wolfspeed SiC Top Side Cooled discrete packages flip the thermal path. Standard TO-247 and D2PAK packages conduct heat through the drain tab to the PCB or heatsink mounted underneath. Top Side Cooled reverses this: the heatsink attaches to the top of the package.
Why does this matter?
→ In high-density power modules, the PCB is often congested. Adding a bottom heatsink requires mechanical clearance that isn't always available. → Top-side cooling allows direct cold plate contact in liquid-cooled systems. → It reduces the thermal resistance path for high-current devices where bottom-cooling creates a bottleneck.
For EV traction inverters and server power stages where thermal density is a primary design constraint, this packaging shift is structurally important — not just a cosmetic redesign.
At PCIM, this wasn't the only SiC booth. onsemi, Infineon, STMicroelectronics, Rohm — all major players were present.
The competitive pressure is visible in Wolfspeed's own chart axes. Competitor A and Competitor B are not hypothetical. Engineers in the room recognized the loss curves.
The shift in the industry is no longer about "SiC vs. IGBT." That argument is largely settled for most high-switching-frequency applications above 20 kW.
The current competition is within SiC generations — and the benchmark that matters is whether Gen 4 improvements translate to system-level efficiency gains in specific applications.
Wolfspeed's answer at PCIM was: here is the bench, here is the oscilloscope, here are the live numbers.
That's a stronger argument than a datasheet.