MIPI D-PHY v1.2 Conformance Testing: What Does It Actually Take to Run a Full CTS Demo on the MSO8000HD?

8 GHz bandwidth. 12-bit ADC. ≤150 fs RMS intrinsic jitter.

These three numbers are not marketing copy.

They are the direct physical translation of what MIPI D-PHY v1.2 conformance testing actually demands from an oscilloscope.

Let me show you exactly why — and what a complete CTS demo looks like from start to finish.

Why 8 GHz, Not 5 GHz

MIPI D-PHY v1.2 supports a maximum data rate of 2.5 Gbps per lane.

Signal fundamental frequency = 1.25 GHz.

But conformance testing doesn't stop at the fundamental. CTS GROUP3 (Data Lane HS-TX) requires accurate measurement of rise and fall times — specifically T-R (20%–80%) and T-F (80%–20%) per the D-PHY specification.

Typical rise time of a 2.5 Gbps LVDS signal: approximately 100–150 ps.

To measure a 100 ps rise time accurately, the minimum oscilloscope bandwidth required is:

BW ≥ 0.35 / T_rise = 0.35 / 100 ps = 3.5 GHz

That is the floor just to see it. Not to measure it correctly.

In practice, probe loading, noise floor, and ADC quantisation error all degrade the result. A 5 GHz scope operating near its bandwidth limit introduces measurable systematic error on the fastest edges at 2.5 Gbps.

→ 8 GHz provides the engineering margin that 5 GHz does not.

The MSO8804HD runs at full 8 GHz + 20 GSa/s in half-channel mode — which means C1 and C3 active simultaneously. That is exactly the correct operating mode for D-PHY differential measurements: one channel pair for the clock lane, one for the data lane.

Why 12-bit, Not 8-bit

Several D-PHY v1.2 CTS test items are directly sensitive to ADC resolution. The clearest example is:

Test 1.3.5 — Data Lane HS-TX Differential Voltage Mismatch (ΔVOD)

Specification limit: |ΔVOD| ≤ 10% of VOD

Typical VOD ≈ 200 mV → limit = 20 mV

Now consider what an 8-bit oscilloscope actually resolves at 50 mV/div:

LSB size = (50 mV/div × 8 div) / 256 = 1.56 mV/LSB 20 mV limit = ~13 LSB

Thirteen quantisation levels to resolve the pass/fail boundary. The statistical scatter in your measurement is of the same order of magnitude as the quantity you are trying to measure.

With a 12-bit ADC at the same range:

LSB size = (50 mV/div × 8 div) / 4096 = 0.098 mV/LSB 20 mV limit = ~204 LSB

→ This is not "better resolution." This is the difference between a measurement with statistical meaning and one without.

The MSO8000HD series specifies ENOB > 7 bits at full bandwidth, 50 mV/div, −3 dBFS. A typical 8-bit oscilloscope under the same conditions delivers approximately 5.5–6 bits ENOB. That is roughly 2.8× fewer usable vertical levels — directly affecting every small-signal differential measurement in the HS-TX test groups.

Test Setup Architecture

D-PHY CTS specifies two distinct measurement configurations:

LP-TX Groups (GROUP1, 2, 6):

→ DUT mounted on TVB (Test Validation Board) → Active differential probe — UT-PD2500 (2.5 GHz, ≤1 pF input capacitance) — connected to CLK or DATA lane → Oscilloscope trigger: Auto/Normal, capturing the LP-11 → LP-01 → LP-00 state transition sequence

HS-TX Groups (GROUP3, 4, 5):

→ DUT output routed through RTB (Reference Termination Board) → SMA cable direct to oscilloscope input (50 Ω), bypassing probe loading entirely → MSO8804HD half-channel mode: C1 on D+, C3 on D− → Math channel: C1 − C3 → differential waveform for VOD / ΔVOD / rise-fall time measurements

Direct SMA connection is not a shortcut — it is what the CTS document specifies for HS transmitter testing. At 2.5 Gbps, probe parasitic capacitance measurably distorts rise time. The RTB provides the correct 100 Ω differential termination while the SMA path keeps the measurement chain clean.

Walking Through the Test Groups

GROUP1 — Data Lane LP-TX (7 items)

LP-TX signals sit at ≈1 V amplitude with rise times in the 5–30 ns range. Bandwidth is not the constraint here. ADC resolution is — because VOH and VOL are absolute voltage measurements where quantisation error directly translates to measurement uncertainty.

GROUP3 — Data Lane HS-TX (16 items, the core group)

Three items that define whether your oscilloscope is actually capable:

→ Test 1.3.4 / 1.3.5 — VOD and ΔVOD

Differential voltage measurement via Math channel (C1 − C3).

Recommended configuration:

C1, C3: DC 50 Ω, 8 GHz BW, 20 GSa/s Math M1: C1 − C3 Vertical scale: 50 mV/div Memory depth: 1 Gpts (for statistical validity)

VOD(0) and VOD(1) are measured at logic 0 and logic 1 states respectively. ΔVOD = |VOD(1) − VOD(0)|, specification ≤ 10% of VOD.

→ Test 1.3.9 / 1.3.10 — Dynamic Common-Mode Voltage Variation (ΔVCMTX)

Split across two frequency ranges:

• Test 1.3.9: ΔVCMTX(LF) — 50 to 450 MHz
• Test 1.3.10: ΔVCMTX(HF) — above 450 MHz

Both require frequency-selective measurement — separating the low-frequency common-mode component from the high-frequency one. The MSO8000HD built-in FIR/IIR filter designer handles this directly in the Math channel. No external post-processing required.

→ Test 1.3.11 / 1.3.12 — Rise and Fall Times (T-R / T-F)

Specification: 20%–80% threshold. Typical values at 2.5 Gbps: 80–200 ps.

At 20 GSa/s, sample interval = 50 ps. A 100 ps rise time spans approximately two sample points across the threshold crossing. Sinusoidal interpolation (enabled by default on the MSO8000HD) extends effective time resolution beyond the raw sample interval — but the intrinsic jitter floor of ≤150 fs RMS ensures the interpolation is not degraded by oscilloscope timing noise.

GROUP4 — Clock Lane HS-TX (18 items)

The two items that matter most here:

→ Test 1.4.17 / 1.4.18 — UIINST and ΔUI

UIINST is the instantaneous unit interval of the HS clock. ΔUI is its deviation from the nominal value. These are the time-domain characterisation of clock quality — directly related to the transmitter's phase noise and PLL performance.

The MSO8000HD-JITTER option provides:

→ TIE (Time Interval Error) trend chart → TIE histogram with RJ / DJ separation → Bathtub curve (BER vs timing margin) → Cycle-to-cycle jitter

UIINST and ΔUI read directly from the jitter analysis panel. No manual calculation needed.

GROUP5 — HS-TX Clock-to-Data Timing (6 items)

The critical item: Test 1.5.4 — Data-to-Clock Skew T-SKEW[TX]

This requires simultaneous acquisition of the clock lane and data lane, then calculating the edge-to-edge timing difference.

MSO8000HD inter-channel synchronisation accuracy: ≤10 ps (typical).

D-PHY v1.2 T-SKEW[TX] specification: typically < 200 ps.

At 10 ps channel synchronisation error, the measurement uncertainty contribution is < 5% of the specification limit. That is an acceptable measurement system error budget.

GROUP6 — Initialisation, ULPS, and BTA (6 items)

Test 1.6.1 requires capturing T-INIT(MASTER) — the LP-TX initialisation period. This is a long time interval (≥100 µs) where the data lane holds the LP-11 state.

This is where the 2 Gpts memory option becomes relevant. At 20 GSa/s, 2 Gpts gives 100 ms of continuous capture. T-INIT is typically specified at ≥100 µs — well within range, with plenty of record length remaining to capture the subsequent state transitions.

Test 1.6.4 / 1.6.5 / 1.6.6 cover BTA (Bus Turn-Around) timing. LP state transitions captured with zone triggering to isolate the specific sequences without manual waveform hunting.

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Realistic Time Budget for a Full Demo

Based on running GROUP1–6 with an experienced engineer and a DUT in known-good condition:

3.5 hours for a complete D-PHY v1.2 TX conformance run under ideal conditions.

In practice — DUT with marginal signal quality, first-time setup, or unexpected state machine behaviour — budget a full day.

Where the MSO8000HD Stops

Equally important as what this setup can do:

Can do (D-PHY v1.2 TX): → Complete GROUP1–6 LP-TX and HS-TX transmitter testing → Jitter decomposition (TIE / RJ / DJ / Cycle-Cycle) → Differential voltage measurements (VOD / ΔVOD / VCMTX) → All timing parameters (T-PREPARE / T-ZERO / T-TRAIL / T-EXIT / T-SKEW)

Cannot do: → D-PHY v2.0 and above — 4.5 Gbps requires 13 GHz+ to maintain adequate measurement margin on rise time. The MSO8804HD's 8 GHz is the correct match for v1.2, not v2.1. → RX receiver testing — requires a pattern generator and BER measurement infrastructure that an oscilloscope alone cannot provide. → C-PHY v1.0 — three-phase encoding, fundamentally different measurement architecture.

→ The MSO8000HD is precisely matched to D-PHY v1.2. It is not the right instrument for v2.0.

That precision match is more useful than a vague claim of "supports MIPI." Every protocol version has a specific instrument bandwidth requirement. Knowing exactly where the boundary sits is more valuable than a feature checkbox.

Three Numbers, One Instrument

MIPI D-PHY v1.2 conformance testing reduces to three oscilloscope requirements:

→ 8 GHz — measurement bandwidth covering 2.5 Gbps signals with adequate margin → 12-bit ADC — resolution sufficient to characterise ΔVOD and small-signal differential parameters near specification limits → ≤150 fs intrinsic jitter — timing noise floor low enough for UIINST / ΔUI / T-SKEW measurements

The MSO8804HD satisfies all three simultaneously.

That alignment is not coincidental. MIPI D-PHY v1.2 was one of the target applications in the MSO8000HD platform specification. The instrument was built to fit the test.

All photos: Thomas · @SignalByThomas